Titulo: LEON y LEON2 processor

Link: http://www.gaisler.com/leonmain.html

Descripción del proyecto

The LEON core is a SPARC* compatible integer unit developed for future space missions. It has been implemented as a highly configurable, synthesisable VHDL model. To promote the SPARC standard and enable development of system-on-a-chip (SOC) devices using SPARC cores, the European Space Agency is making the full source code freely available under the GNU LGPL license. Gaisler Research has developed the 32-bit high-performance LEON processor core, which is available under the GNU open-source license. The development of the processor is supported by the European Space Agency and LEON is currently used in both aerospace and consumer products. A newly developed Floating Point Unit (GRFPU) is designed for the usage with LEON.

Desarrolladores

The European Space Agency y Gaisler Research

Modelo de Licencia

GNU GPL

Otros

Otros links al proyecto:
http://www.estec.esa.nl/wsmwww/leon/leon.html
http://www.estec.esa.nl/microelectronics/leon/

Titulo: Opencores

Link: http://www.opencores.org/

Descripción del proyecto

Our main objective is to design and publish core designs under a license for hardware modelled on the Lesser General Public License (LGPL) for software. We are committed to the ideal of freely available, freely usable and re-usable open source hardware.
OpenCores is a loose collection of people who are interested in developing hardware, with a similar ethos to the free software movement. Currently the emphasis is on digital modules called 'cores', since FPGAs have reduced the incremental cost of a core to approximately zero. Activity is centered around the opencores web site (http://www.opencores.org).
There is no formal affiliation between the people who make up opencores. They are a bunch of people who just happen to be walking in the same direction along a road. This is a dynamic group. People regularly join and leave. As a whole, the group progresses through the independent contributions of individuals.

Desarrolladores

Who contributes to opencores?
Students, professionals, companies, anyone who is interested. For all we know, the person who contributed that amazing core taught him/herself to design hardware by reading books in their spare time.
Where is opencores situated?
The main server is physically located in Slovenia, Europe. Contributors are located right around the globe. A mirror of opencores' server is located in Indonesia. More mirrors are wanted.

Modelo de Licencia

Cada proyecto tiene la suya, pero se alienta el uso de la GPL o la LGPL.

Titulo: The Free-IP Project

Link: http://www.free-ip.com/

Descripción del proyecto

The Free-IP project is an effort to make quality IP available to anyone.

Modelo de Licencia

FREE IP GENERAL PUBLIC LICENSE

Otros

En el siguiente link se habla del modelo de desarrollo abierto, el modelo económico y sobre asuntos legales. http://www.free-ip.com/about.htm

Titulo: Free Model Foundry (FMF)

Link: http://www.eda.org/fmf/

Descripción del proyecto

The Free Model Foundry (FMF) promotes the development and free distribution of open source models of electronic components in system design.
Founded in 1995, The Free Model Foundry is dedicated to promoting standard modeling practices within the electrical engineering comunity. In particular, we support the use of VHDL, Verilog, and IBIS modeling languages.
The Free Model Foundry (FMF) believes in free, open source distribution of simulation and analysis models of electronic components. It promotes the development, distribution and sharing of functional simulation models (with timing) for board level components.

Responsable

Richard Munden: rick.mundenATeda.org
Free Model Foundry, 324 N Murphy Av, Sunnyvale, CA 94085, USA

Modelo de Licencia

All models distributed by the Free Model Foundry are considered to be software and are protected by the GNU General Public License, Version 2. As such, you are permitted to download and use them, without charge, in any manner you wish. However, redistribution is subject to the terms and conditions of the license.
http://www.eda.org/fmf/wwwpages/copyright.html

Titulo: The Freedom CPU Project

Link: http://www.f-cpu.org/

Descripción del proyecto

The Freedom CPU Project is an open work of collaboration in the world of microelectronics. Our goal is to create and distribute the source code of a high performance microprocessor core under a copyleft license. It's the first purely SIMD superpipelined RISC CPU core that handles 64-bit data and wider, so it can become a short vector processor in the future, and all the VHDL sources and resources are Free as in Free Speech !

Titulo: Silicore Corporation

Link: http://www.silicore.net/

Descripción de la empresa

Silicore Corporation provides expert technology and business services in the areas of: electronic design, sensors, IP cores, System-on-Chip (SoC), field programmable gate array (FPGA), VMEbus microcomputer boards, microprocessor IC design, training, code maintenence and patent research. Complete custom design services from concept to production are available. Rapid protytyping is a specialty. Silicore also provides off-the-shelf System-on-Chip designs in the form of microprocessor cores and VMEbus interfaces.

Desarrollos

8-BIT RISC Microcontroller
Now available under open source licensing! The Silicore SLC1657 is a VHDL 8-bit RISC Microcontroller Core for FPGA or ASIC. Create your own custom microcontroller on a single FPGA chip! This portable, synthesizable, microprocessor core leaves plenty of room in your FPGA for your own interfaces and I/O. Numerous software tools are available for the Silicore SLC1657. The core is software compatible with the industry standard PIC® microcontrollers, with a wide range of assembler, simulator, 'C' compilers and fuzzy logic tools. Best of all, it's available as free software under the GNU Lesser GPL license!

ME64 to PCI Brige System-on-Chip (SoC)
The Silicore VME64 to PCI Bridge System-on-Chip is now available for download under public (LGPL) licensing. Build your own VMEbus to PCI bridge for a fraction of the cost of commercial chips.

The WISHBONE System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores makes IP core integration easier. It defines a common, logical interface between IP cores. This improves the portability and reliability of the system components, and results in faster time-to-market for the end user. Fundamentally, it's a microcomputer bus that is tailored for the needs of IC system integration. The WISHBONE specification is a public domain document and is available at no cost. Products may use this standard without any royalty obligations. Complete libraries of WISHBONE compatible systems and cores are also available under open, public licensing. For more information see the WISHBONE Service Center.

Titulo: MPGA - Meta Programmable Gate Array

Link: http://ce.et.tudelft.nl/~reinoud/mpga/README.html

Descripción del proyecto

This is an open source design for an FPGA to be implemented on an FPGA; a 'meta-FPGA' (hence the name). If you wonder whether something like that makes any sense, then chances are that it won't be useful to you. However, this MPGA has a few nice properties that 'real' FPGAs lack. It has open programming specs, and a bitstream format that's amazingly easy to edit. This means that you aren't bound by limitations of vendor tools. (If you wonder what those limitations are, don't worry, be happy;). The open specs and design can also be especially attractive for open source tool development. Another notable feature is that you can (re)program an MPGA as fast as you like (and are willing to spend bandwidth on). This is rather nice for reconfigurable computing or evolutionary design experiments.

Desarrolladores

Reinoud Lamberts, Delft University of Technology, Holanda

Modelo de Licencia

DSL - Design Science License. http://ce.et.tudelft.nl/~reinoud/mpga/DSL

Otros

The MPGA project is currently in a larval stage.

Titulo: Open Collector

Link: http://opencollector.org/

Descripción del proyecto

Open Collector carries listings and news for free EDA software and circuit designs.

Responsable

Graham Seaman (grahamATopencollector.org)

Titulo: Hamburg VHDL Archive

Link: http://tech-www.informatik.uni-hamburg.de/vhdl/

Descripción del proyecto

Welcome to the Hamburg VHDL archive! We intend to provide a collection of free, i.e. public-domain or shareware, VHDL documentation, models, and tools.

Desarrolladores

Universidad de Hamburgo.

Titulo: LEOX - Free Resources for System on Chip

Link: http://www.leox.org/

Descripción del proyecto

LEOX stands for the LEON toolbOX!

The goal of the LEOX project is to have a complete, free, open source, set of hardware and software components usable to build an embedded computer with its operating system that can be incorporated easily into a FPGA or into an ASIC...
This embedded computer should be small and easily synthesisable on any technology.
In 1999, Jiri Gaisler of the European Space Agency has released the first version of LEON, an open source VHDL implementation of a SPARC V8 core... The core, now in its second version, comes with a software environment based around the GNU tools, an AMBA based bus system architecture, many synthesis scripts and a set of peripherals making it an ideal basis for an open source complete embedded computer system.
In 1998, Kenneth Albanowski and Donald Jeff Dionne released uClinux, a port of Linux that runs on processors lacking a MMU (Memory Management Unit). Because LEON has no such MMU, uClinux is the natural starting point of our quest for a Linux port for LEON...

Titulo: Open Design Fundation

Link: http://opendesign.org:8080/

Descripción del proyecto

The mission of the Open Design Foundation is to promote an alternative method for designing and developing technology, based on the free exchange of comprehensive design information.

Responsables

Principalmente en el MIT

Modelo de Licencia

Software:
Since our project often incorporate software we recommend using the copyleft or GPL from GNU for most cases. In some situations, however, the LGPL is more appropriate.

Documentation:
Again GNU has a good model here and we recommend following the GNU Free Documentation License.

Hardware:
As far as we can tell there is no exact model to follow here. In fact hardware design is not clearly covered by copyright laws. Designs disclosed but not patented are basically placed in the public domain, which is close but not exactly the goal of Open Design. We have developed a parallel to the Open Source Definition for hardware: the Open Design Definition. We have also put together a license document (coming soon) that is called the ODHL (Open Design Hardware License).

Titulo: gEDA

Link: http://www.geda.seul.org/

Descripción del proyecto

The gEDA project is working on producing a full GPL'd suite of Electronic Design Automation tools. These tools are used for electrical circuit design, schematic capture, simulation, prototyping, and production. The gEDA project was started because of the lack of free EDA tools for UNIX. The tools are being developed mainly on GNU/Linux machines, but considerable effort is being made to make sure that gEDA runs on other UNIX variants.

Desarrolladores

Una gran cantidad de desarrolladores de todas partes del mundo.

Modelo de Licencia

GNU GPL.

Titulo: ThinkCycle

Link: http://www.thinkcycle.org

Descripción del proyecto

ThinkCycle is an academic, non-profit initiative engaged in supporting distributed collaboration towards design challenges among underserved communities and the environment. ThinkCycle seeks to create a culture of open-source design innovation, with ongoing collaboration among individuals, communities and organizations around the world.

Responsables

ThinkCycle is an academic non-profit initiative, developed and operated by a group of doctoral students at the MIT Media Laboratory with the support of many students and faculty throughout MIT.